2 天之前 · NVIDIA CEO Jensen Huang says he can't trust Samsung's HBM memory, 'we cannot trust and do business with them because senior executives change frequently'.

2 天之前 · NVIDIA's CEO Jensen Huang has said that Team Green cannot trust Samsung's HBM process, creating a new roadblock in the relations.

22 小时之前 · Nvidia approves Samsungs HBM chips, Bloomberg reports Samsung Electronics cleared by Nvidia to supply 8-layer HBM3E chips for less advanced AI memory

1 天前 · Nvidia’s approval has been long in the works, as Samsung races to catch up to fellow Korean chipmaker SK Hynix Inc., Nvidia’s go-to partner for supplying the most advanced HBM to pair with its ...

1 天前 · Samsung Electronics Co. has obtained approval to supply a version of its fifth-generation high-bandwidth memory chips to Nvidia Corp., according to people familiar with the matter.

2024年8月8日 · TrendForce also noted that the first-generation H100 chip in NVIDIA's Hopper series was equipped with 80 GB of HBM, whereas the H200—to be released in 2024—will boast a capacity of 144 GB. The combined growth of AI chips and single-chip capacity will substantially increase overall HBM consumption.

2024年7月23日 · Samsung Electronics' fourth-generation high bandwidth memory or HBM3 chips have been cleared by Nvidia for use in its processors for the first time, three people briefed on the matter said.

2023年11月13日 · As it turns out, by adding more HBM memory and by moving to faster HBM3e memory at that, Nvidia can get exactly the same kind of performance boost on the existing Hopper GPU design without having to add more CUDA cores or overclock the GPU.

2024年7月21日 · HBM is an advanced, high-performance memory chip. It is a crucial component of Nvidia’s graphics processing units (GPUs), which power generative AI systems such as OpenAI’s ChatGPT. HBM transfers data faster than any other memory chip, making it particularly suitable for large AI workloads.

2023年11月13日 · The true backbone of NVIDIA’s H100/H200 family, the HGX carrier boards house 8 SXM form factor accelerators linked up in a pre-arranged, fully-connected topology.